TGL/ADLS: SAMPLER_MODE register bit0 apparently not set
In https://cgit.freedesktop.org/drm-tip/commit/drivers/gpu/drm/i915/gt/intel_workarounds.c?id=16fc9c08f0ec7b1c95f1ea4a16097acdb3fc943d
we implemented WaSetIndirectStateOverride which sets SAMPLER_MODE
bit0.
The setting of the bit0 appears not to work properly.
Using this mesa branch mesa/mesa!22151 (merged) and running the VK CTS test dEQP-VK.binding_model.descriptor_buffer.single.graphics_vert_combined_image_sampler
we get a failure on TGL/ADLS. DG2 is working fine though.
Same test passes fine on simulation with WaSetIndirectStateOverride implemented.
intel_reg read also reports the SAMPLER_MODE bit as not set :
# intel_reg read 0xe18c
(0x0000e18c): 0x00003020
Writing the bit has no effect :
# intel_reg write 0xe18c 0x00010001
# intel_reg read 0xe18c
(0x0000e18c): 0x00003020
@mattrope reports that for him on ADLP, writing and reading the bit is working fine.