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sm50: misc additions and fixes

Benjamin Lee requested to merge benjaminl/mesa:nak/sm50 into nak/sm50-rebased

Combined with mesa/mesa!25167 (merged), SM50 NAK has only one failure in dEQP-VK.compute.*.

Test run totals:
  Passed:        77/5471 (1.4%)
  Failed:        1/5471 (0.0%)
  Not supported: 5393/5471 (98.6%)
  Warnings:      0/5471 (0.0%)
  Waived:        0/5471 (0.0%)

(I have a branch with both of these merged here for testing)

Next steps

Scheduling

There are two known problems preventing the existing sched implementation from working on SM50, and likely several unknown problems. The first known problem is that some instructions that are fixed latency on SM75 are variable latency on SM50. The second is the carry flag register used in IADD and IMAD, which isn't getting picked up as a dependency yet.

For the instruction latency, we can probably just copy the values from codegen, if they are accurate.

One way to handle the carry register might be to add RegFile::Carry and represent carries as src/dst in SSA. Regalloc would then assign the SSA carry register uses to the single carry register and spill to general registers when necessary.

Barrier/sync instructions

Most of these don't exist on SM50 and I'm not sure what we should be doing instead. For now, I'm just dropping them.

dEQP-VK.compute.basic.image_atomic_op_local_size_8

This is the failing CTS case. I poked at it for a while but couldn't figure out the problem.

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