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  • topic/adl-s-enabling-2021-02-01-1
    Driver Changes:
      - Add basic support for Alder Lake S, to be shared between
      drm-intel-next and drm-intel-gt-next
  • topic/adl-s-enabling-2021-02-01
    Driver Changes:
      - Add basic support for ADL-S, to be shared between drm-intel-next and
      drm-intel-gt-next
  • drm-intel-next-2021-01-29
    - WARN if plane src coords are too big (Ville)
    - Prevent double YUV range correction on HDR planes (Andres)
    - DP MST related Fixes (Sean, Imre)
    - More clean-up around DRAM detection code (Jose)
    - Actually async flips enable for all ilk+ platforms (Ville)
    
  • drm-intel-fixes-2021-01-28
    drm/i915 fixes for v5.11-rc6:
    - Fix ICL MG PHY vswing
    - Fix subplatform handling
    - Fix selftest memleak
    - Clear CACHE_MODE prior to clearing residuals
    - Always flush the active worker before returning from the wait
    - Always try to reserve GGTT address 0x0
  • drm-intel-next-2021-01-27
    - HDCP 2.2 and HDCP 1.4 Gen12 DP MST support (Anshuman)
    - Fix DP vswing settings and handling (Imre, Ville)
    - Various display code clean-up (Jani, Ville)
    - Various display refactoring, including split out of pps, aux, and fdi (Ja\
    ni, Dave)
    - Add DG1 missing workarounds (Jose)
    - Fix display color conversion (Chris, Ville)
    - Try to guess PCH type even without ISA bridge (Zhenyu)
    - More backlight refactor (Lyude)
    - Support two CSC module on gen11 and later (Lee)
    - Async flips for all ilk+ platforms (Ville)
    - Clear color support for TGL (RK)
    - Add a helper to read data from a GEM object page (Imre)
    - VRR/Adaptive Sync Enabling on DP/eDP for TGL+ (Manasi, Ville Aditya)
    
  • drm-intel-fixes-2021-01-21
    drm/i915 fixes for v5.11-rc5:
    - HDCP fixes
    - PMU wakeref fix
    - Fix HWSP validity race
    - Fix DP protocol converter accidental 4:4:4->4:2:0 conversion for RGB
  • drm-intel-gt-next-2021-01-21-1
    Cross-subsystem Changes:
    
    - Includes gvt-gt-next-2021-01-18 + header check fix for GVT
    
    Driver Changes:
    
    - Fix for #2955: Clear potentially malicious register state before
      executing clear residuals security mitigation (Chris)
    - Fixes that lead to marking per-engine-reset as supported on Gen7
      (Chris)
    - Remove per-client stats from debugfs/i915_gem_objects) (Tvrtko, Chris)
    - Add arbitration check before semaphore wait (Chris)
    - Apply interactive priority to explicit flip fences (Chris)
    - Make GEM errors non-fatal by default to help capturing logs during
      development (Chris)
    - Fix object page offset within a region in error capture (CQ, Matt A)
    - Close race between enable_breadcrumbs and cancel_breadcrumbs (Chris)
    - Almagamate clflushes on suspend/freeze to speed up S/R (Chris)
    - Protect used framebuffers from casual eviction (Chris)
    
    - Fix the sgt.pfn sanity check (Kui, Matt A)
    - Reduce locking around i915_request.lock and ctx->engines_mutex (Chris)
    - Simplify tracking for engine->fw_active and stats.active (Chris)
    - Constrain pool objects by mapping type (Chris, Matt A)
    - Use shrinkable status for unknown swizzle quirks (Chris)
    - Do not suspend bonded requests if one hangs (Chris)
    - Restore "Skip over completed active execlists" optimization (Chris)
    
    - Move stolen node into GEM object union (Chris)
    . Split gem_create into own file (Matt A)
    - Convert object_create into object_init in LMEM region code (Matt A)
    - Reduce test_and_set_bit to set_bit in i915_request_submit() (Chris)
    - Mark up protected uses of 'i915_request_completed' (Chris)
    - Remove extraneous inline modifiers (Chris)
    - Add function to define defaults for GuC/HuC enable (John)
    
    - Improve code locality by moving closer to single user (Matt A, Chris)
    - Compiler warning fixes (Matt A, Chris)
    - Selftest / CI improvements (Chris)
  • drm-intel-gt-next-2021-01-14
    UAPI Changes:
    - Deprecate I915_PMU_LAST and optimize state tracking (Tvrtko)
    
      Avoid relying on last item ABI marker in i915_drm.h, add a
      comment to mark as deprecated.
    
    Cross-subsystem Changes:
    
    Core Changes:
    
    Driver Changes:
    
    - Restore clear residuals security mitigations for Ivybridge and
      Baytrail (Chris)
    - Close #1858: Allow sysadmin to choose applied GPU security mitigations
      through i915.mitigations=... similar to CPU (Chris)
    - Fix for #2024: GPU hangs on HSW GT1 (Chris)
    - Fix for #2707: Driver hang when editing UVs in Blender (Chris, Ville)
    - Fix for #2797: False positive GuC loading error message (Chris)
    - Fix for #2859: Missing GuC firmware for older Cometlakes (Chris)
    - Lessen probability of GPU hang due to DMAR faults [reason 7,
      next page table ptr is invalid] on Tigerlake (Chris)
    - Fix REVID macros for TGL to fetch correct stepping (Aditya)
    - Limit frequency drop to RPe on parking (Chris, Edward)
    - Limit W/A 1406941453 to TGL, RKL and DG1 (Swathi)
    - Make W/A 22010271021 permanent on DG1 (Lucas)
    - Implement W/A 16011163337 to prevent a HS/DS hang on DG1 (Swathi)
    - Only disable preemption on gen8 render engines (Chris)
    - Disable arbitration around Braswell's PDP updates (Chris)
    - Disable arbitration on no-preempt requests (Chris)
    - Check for arbitration after writing start seqno before busywaiting (Chris)
    - Retain default context state across shrinking (Venkata, CQ)
    - Fix mismatch between misplaced vma check and vma insert for 32-bit
      addressing userspaces (Chris, CQ)
    - Propagate error for vmap() failure instead kernel NULL deref (Chris)
    - Propagate error from cancelled submit due to context closure
      immediately (Chris)
    - Fix RCU race on HWSP tracking per request (Chris)
    - Clear CMD parser shadow and GPU reloc batches (Matt A)
    
    - Populate logical context during first pin (Maarten)
    - Optimistically prune dma-resv from the shrinker (Chris)
    - Fix for virtual engine ownership race (Chris)
    - Remove timeslice suppression to restore fairness for virtual engines (Chris)
    - Rearrange IVB/HSW workarounds properly between GT and engine (Chris)
    - Taint the reset mutex with the shrinker (Chris)
    - Replace direct submit with direct call to tasklet (Chris)
    - Multiple corrections to virtual engine dequeue and breadcrumbs code (Chris)
    - Avoid wakeref from potentially hard IRQ context in PMU (Tvrtko)
    - Use raw clock for RC6 time estimation in PMU (Tvrtko)
    - Differentiate OOM failures from invalid map types (Chris)
    - Fix Gen9 to have 64 MOCS entries similar to Gen11 (Chris)
    - Ignore repeated attempts to suspend request flow across reset (Chris)
    - Remove livelock from "do_idle_maps" VT-d W/A (Chris)
    - Cancel the preemption timeout early in case engine reset fails (Chris)
    - Code flow optimization in the scheduling code (Chris)
    - Clear the execlists timers upon reset (Chris)
    - Drain the breadcrumbs just once (Chris, Matt A)
    - Track the overall GT awake/busy time (Chris)
    - Tweak submission tasklet flushing to avoid starvation (Chris)
    - Track timelines created using the HWSP to restore on resume (Chris)
    - Use cmpxchg64 for 32b compatilibity for active tracking (Chris)
    - Prefer recycling an idle GGTT fence to avoid GPU wait (Chris)
    
    - Restructure GT code organization for clearer split between GuC
      and execlists (Chris, Daniele, John, Matt A)
    - Remove GuC code that will remain unused by new interfaces (Matt B)
    - Restructure the CS timestamp clocks code to local to GT (Chris)
    - Fix error return paths in perf code (Zhang)
    - Replace idr_init() by idr_init_base() in perf (Deepak)
    - Fix shmem_pin_map error path (Colin)
    - Drop redundant free_work worker for GEM contexts (Chris, Mika)
    - Increase readability and understandability of intel_workarounds.c (Lucas)
    - Defer enabling the breadcrumb interrupt to after submission (Chris)
    - Deal with buddy alloc block sizes beyond 4G (Venkata, Chris)
    - Encode fence specific waitqueue behaviour into the wait.flags (Chris)
    - Don't cancel the breadcrumb interrupt shadow too early (Chris)
    - Cancel submitted requests upon context reset (Chris)
    - Use correct locks in GuC code (Tvrtko)
    - Prevent use of engine->wa_ctx after error (Chris, Matt R)
    
    - Fix build warning on 32-bit (Arnd)
    - Avoid memory leak if platform would have more than 16 W/A (Tvrtko)
    - Avoid unnecessary #if CONFIG_PM in PMU code (Chris, Tvrtko)
    - Improve debugging output (Chris, Tvrtko, Matt R)
    - Make file local variables static (Jani)
    - Avoid uint*_t types in i915 (Jani)
    - Selftest improvements (Chris, Matt A, Dan)
    - Documentation fixes (Chris, Jose)
  • drm-intel-fixes-2021-01-14
    drm/i915 fixes for v5.11-rc4:
    - Allow the sysadmin to override security mitigations
    - Restore clear-residual mitigations for ivb/byt
    - Limit VFE threads based on GT
    - GVT: fix vfio edid and full display detection
    - Fix DSI DSC power refcounting
    - Fix LPT CPU mode backlight takeover
    - Disable RPM wakeref assertions during driver shutdown
    - Fix DSI sequence sleeps
  • drm-intel-next-2021-01-12
    - PSR fixes and improvements for selective fetch (Jose)
    - GVT build fixed and cleanup (Jani)
    - RKL display fixes (Lee, Matt)
    - DSI fix (Hans)
    - Panel Power and Backlight fixes (Anshuman, Jani)
    - RPM fix (Chris)
    - Fix HTI port checking (Jose)
    - Clean-up in cursor code (Ville)
    - Once again, trying to use fast+narrow link on eDP (Ville)
    - DG1 display fix (Matt)
    
  • drm-intel-fixes-2021-01-07
    drm/i915 fixes for v5.11-rc3:
    - Use per-connector PM QoS tracking for DP aux communication
    - GuC firmware fix for older Cometlakes
    - Clear the gpu reloc and shadow batches
  • drm-intel-next-2021-01-04
    - Display hotplug fix for gen2/gen3 (Chris)
    - Remove trailing semicolon (Tom)
    - Suppress display warnings for old ifwi presend on our CI (Chris)
    - OA/Perf related workaround (Lionel)
    - Replace I915_READ/WRITE per new uncore and display read/write functions (Jani)\
    .
    - PSR improvements (Jose)
    - HDR and other color changes on LSPCON (Uma, Ville)
    - FBC fixes for TGL (Uma)
    - Record plane update times for debugging (Chris)
    - Refactor panel backlight control functions (Dave)
    - Display power improvements (Imre)
    - Add VRR register definition (Manasi)
    - Atomic modeset improvements for bigjoiner pipes (Ville)
    - Switch off the scanout during driver unregister (Chris)
    - Clean-up DP's FEW enable (Manasi)
    - Fix VDSCP slice count (Manasi)
    - Fix and clean up around rc_model_size for DSC (Jani)
    - Remove Type-C noisy debug warn message (Sean)
    - Display HPD code clean-up (Ville)
    - Refactor Intel Display (Dave)
    - Start adding support for Intel's eDP backlight controls (Lyude)
    
  • topic/dp-hdmi-2.1-pcon-2020-12-23
    Add support for DP-HDMI2.1 PCON
    
    From the series cover letter:
    
    This patch series attempts to add support for a DP-HDMI2.1 Protocol
    Convertor. The VESA spec for the HDMI2.1 PCON are proposed in Errata
    E5 to DisplayPort_v2.0:
    https://vesa.org/join-vesamemberships/member-downloads/?action=stamp&fileid=42299
    The details are mentioned in:
    VESA DP-to-HDMI PCON Specification Standalone Document
    https://groups.vesa.org/wg/DP/document/15651
    
    This series starts with adding support for FRL (Fixed Rate Link)
    Training between the PCON and HDMI2.1 sink.
    As per HDMI2.1 specification, a new data-channel or lane is added in
    FRL mode, by repurposing the TMDS clock Channel. Through FRL, higher
    bit-rate can be supported, ie. up to 12 Gbps/lane (48 Gbps over 4
    lanes).
    
    With these patches, the HDMI2.1 PCON can be configured to achieve FRL
    training based on the maximum FRL rate supported by the panel, source
    and the PCON.
    The approach is to add the support for FRL training between PCON and
    HDMI2.1 sink and gradually add other blocks for supporting higher
    resolutions and other HDMI2.1 features, that can be supported by pcon
    for the sources that do not natively support HDMI2.1.
    
    This is done before the DP Link training between the source and PCON
    is started. In case of FRL training is not achieved, the PCON will
    work in the regular TMDS mode, without HDMI2.1 feature support.
    Any interruption in FRL training between the PCON and HDMI2.1 sink is
    notified through IRQ_HPD. On receiving the IRQ_HPD the concerned DPCD
    registers are read and FRL training is re-attempted.
    
    Currently, we have tested the FRL training and are able to enable 4K
    display with TGL Platform + Realtek PCON RTD2173 with HDMI2.1 supporting
    panel.
  • drm-intel-next-fixes-2020-12-18
    drm/i915 fixes for the merge window
  • drm-intel-fixes-2020-12-09
    Fixes for VDSC/DP, selftests, shmem_utils, preemption, submission, and gt reset:
    
    - Check the correct variable in selftest (Dan)
    - Propagate error from canceled submit due to context closure (Chris)
    - Ignore repeated attempts to suspend request flow across reset (Chris)
    - Cancel the preemption timeout on responding to it (Chris)
    - Fix unsigned compared against 0 (Colin)
    - Compute the correct slice count for VDSC on DP (Manasi)
    - Declar gen9 has 64 mocs entries (Chris)
    
  • drm-intel-fixes-2020-12-03
    Fixes for GPU hang, null dereference, suspend-resume, power consumption, and use-after-free.
    
    - Program mocs:63 for cache eviction on gen9 (Chris)
    - Protect context lifetime with RCU (Chris)
    - Split the breadcrumb spinlock between global and contexts (Chris)
    - Retain default context state across shrinking (Venkata)
    - Limit frequency drop to RPe on parking (Chris)
    - Return earlier from intel_modeset_init() without display (Jani)
    - Defer initial modeset until after GGTT is initialized (Chris)
    
  • drm-intel-fixes-2020-12-02
    Fixes for GPU hang, null dereference, suspend-resume, power consumption, and use-after-free.
    
    - Program mocs:63 for cache eviction on gen9 (Chris)
    - Split the breadcrumb spinlock between global and contexts (Chris)
    - Retain default context state across shrinking (Venkata)
    - Limit frequency drop to RPe on parking (Chris)
    - Return earlier from intel_modeset_init() without display (Jani)
    - Defer initial modeset until after GGTT is initialized (Chris).
    
  • drm-intel-next-queued-2020-11-27
    drm/i915 features for v5.11:
    
    Highlights:
    - Enable big joiner to join two pipes to one port to overcome pipe restrictions
      (Manasi, Ville, Maarten)
    
    Display:
    - More DG1 enabling (Lucas, Aditya)
    - Fixes to cases without display (Lucas, José, Jani)
    - Initial PSR state improvements (José)
    - JSL eDP vswing updates (Tejas)
    - Handle EDID declared max 16 bpc (Ville)
    - Display refactoring (Ville)
    
    Other:
    - GVT features
    - Backmerge
  • drm-intel-fixes-2020-11-25
    - Fix Perf/OA workaround register corruption (Lionel)
    - Correct a comment statement in GVT (Yan)
    - Fix GT enable/disable iterrupts, including a race condition that prevented GPU to go idle (Chris)
    - Free stale request on destroying the virtual engine (Chris)
    
  • drm-intel-fixes-2020-11-19
    - Fix tgl power gating issue (Rodrigo)
    - Memory leak fixes (Tvrtko, Chris)
    - Selftest fixes (Zhang)
    - Display bpc fix (Ville)
    - Fix TGL MOCS for PTE tracking (Chris)
    
    GVT Fixes: It temporarily disables VFIO edid
    feature on BXT/APL until its virtual display is really fixed to make
    it work properly. And fixes for DPCD 1.2 and error return in taking
    module reference.